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Meta MTIA (Meta Training and Inference Accelerator)

Definition

MTIA is Meta's in-house family of AI accelerator silicon — the proprietary-chip axis of Meta's heterogeneous AI hardware fleet alongside NVIDIA GPUs, AMD GPUs, and CPUs. Unlike vendor silicon (NVIDIA / AMD), MTIA "chips are proprietary, no public LLM has been trained on MTIA code" — a forcing function for any code-generation system targeting MTIA to inject the ISA / architecture / memory-hierarchy docs directly rather than rely on pretraining knowledge (Source: sources/2026-04-02-meta-kernelevolve-how-metas-ranking-engineer-agent-optimizes-ai-infrastructure).

Generation cadence — MTIA 300 → 500

Meta's MTIA roadmap spans "four chip generations in two years (MTIA 300 through 500), each introducing new compute capabilities, memory bandwidth characteristics, and numeric data types optimized for evolving workloads. A kernel optimized for one generation will underperform when run on the next generation of the same hardware architecture." This two-year cadence is faster than an external silicon vendor's refresh tempo and is the key driver behind Meta needing agentic kernel-authoring systems (KernelEvolve) rather than hand-tuning — no kernel-expert team scales to four generations × every operator × production-model-shape space.

Profiling + instrumentation

MTIA's in-house profiling stack — MTIA Insight — exposes accelerator-specific signals not present on GPU platforms:

  • PE utilization (processing-element utilization)
  • Fixed-function engine metrics (DPE / SFU / MLU utilization and stall cycles)
  • Cache behavior
  • Per-PE memory bandwidth counters

These structured signals feed KernelEvolve's evaluation harness so the search engine sees "why" a candidate kernel is slow (memory-bound vs compute-bound vs occupancy-limited) — not just a wall-clock speedup number (Source: sources/2026-04-02-meta-kernelevolve-how-metas-ranking-engineer-agent-optimizes-ai-infrastructure).

Programming model

MTIA code is written in MTIA C++ (one of the low-level backends KernelEvolve emits kernels for, alongside CUDA for NVIDIA and HIP for AMD). Meta's KernelEvolve generates MTIA kernels via systematic knowledge injection — MTIA architecture manuals, instruction-set references, memory-hierarchy specifications, and optimization patterns are encoded into a retrieval-augmented knowledge base and retrieved on demand when the synthesizer targets MTIA. Canonical wiki instance of hardware proprietary knowledge injection.

Production role

On MTIA, KernelEvolve-generated kernels achieve >25% training throughput improvement on an ads model (name not disclosed). The kernels span compute-bound, memory-bound, and custom operations (Source: sources/2026-04-02-meta-kernelevolve-how-metas-ranking-engineer-agent-optimizes-ai-infrastructure).

MTIA is one of the accelerator targets behind Meta Ads's Meta Adaptive Ranking Model serving stack, though the 2026-03-31 MARM post does not itemize per-hardware share.

Seen in

Caveats

Public information is limited to what Meta discloses on engineering.fb.com and ai.meta.com. Per-generation performance, die size, process node, memory subsystem, and production deployment share are not published. The 2024 MTIA blog post (ai.meta.com/blog/next-generation-meta-training-inference-accelerator-AI-MTIA) and the 2025 MTIA-at-scale post (ai.meta.com/blog/meta-mtia-scale-ai-chips-for-billions) are not ingested on the wiki.

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